At the 2014 Symposium on VLSI Technology, researchers from the University of California at Santa Barbara (UCSB) introduced the highest performing III-V metal-oxide semiconductor (MOS) field-effect transistors (FETs). The researchers expect that high performance servers will employ the MOSFET and with high performance and lower power consumption. The Semiconductor Research Corporation (SRC), a university-research consortium for semiconductors and related technologies, supported the research.
Uniquely, the UCSB team’s relatively small III-V MOSFETs, exhibit on-current, off-current, and operating voltage comparable to or exceeding production silicon devices. UCSB’s 25 nanometer gate length transistors require only 0.5 volts to operate with an on-current of 0.5mA and off-current of 100nA per micron of transistor width.
Mark Rodwell, professor of Electrical and Computer Engineering, UCSB said, “In time, the UCSB III-V MOSFET should perform significantly better than silicon FinFETs of equal size.”
Three key improvements went into the III-V MOSFET structure. First, the transistors employ extremely thin, indium arsenide (InAs) semiconductor channels of just 2.5 nm (17 atoms) thick for improved on-current and reduced off current. Next, the UCSB transistors use very-high-quality gate insulators, dielectrics between the gate electrode and the semiconductor. These layers are a stack of alumina (Al2O3,on InAs) and zirconia (ZrO2), and have a very high capacitance density. Thirdly, the transistors use a vertical spacer layer design avoids band-to-band tunneling and maks the leakage currents smaller. Therefore, the off-current can rival that of silicon MOSFETs.