FinScale Introduces qFinFET Technology, a 3D MOSFET Architecture

FinScale Incorporated of Livermore, California, announced the immediate availability of its qFinFET™ technology, a 3D MOSFET architecture and manufacturable process that is transferable to foundries and integrated device manufacturers. The qFinFET technology reportedly improves power efficiency, performance, and circuit density, and offers significantly lower manufacturing costs, parametric variability, and leakage than available advanced node FinFET and planar technology alternatives. The quantum FinFET device architecture that the company optimized for quantum effects, ballistic transport and the nano-material properties of silicon.

The technology reportedly includes high density and high-performance logic and memory configurations, along with inherent low-noise analog/RF device characteristics for a robust SoC platform on bulk or SOI substrates. Standalone DRAM, SRAM and flash memory designers and producers can arrange the included bit cells into dense arrays, and construct dense, highly reliable low-leakage pass transistors and sense amplifiers.

“The qFinFET technology elegantly combines the advantages of current FinFET and planar FD-SOI technologies and mitigates their inherent weaknesses to provide a unifying platform that will put the semiconductor industry back on track with Moore’s Law,” said George Cheroff, a prominent IBM Research manager and semiconductor pioneer.