Corial Offers ICP Process for Etching 6″ Patterned Sapphire Substrate Wafers

Corial of Bernin, France, has made available its ICP (inductively coupled plasma) process to etch 6″ patterned sapphire substrate wafers. Corial says that the ICP process can be used in high-volume LED production with the company’s fully automated PS200 single-module platform. The patterned sapphire substrate (PSS) is the LED industry standard for producing brighter LEDs, says the firm.

Corial notes that back in 2009, it was among the first companies to offer a stand-alone ICP system with etching processes specifically for PSS applications. Since then, the firm has continued to innovate to offer cost-effective solutions for LED production.The company based the PS200 on a production-proven plasma technology. The system is a fully automated single-module platform combining etching performance for PSS applications with high productivity on sapphire substrates.
The high-density plasma source reportedly provides process repeatability and uniformity.

The PS200 features fully automated wafer handling with single-wafer processing with a Brooks elevator for front-end cassette in vacuum load-lock and a Brooks robot in vacuum transfer chamber. Corial says that the platform is extendable to up to three process modules. According to Corial, a combination of soft mechanical clamping with helium backside cooling maximizes etching uniformity and the in-situ plasma cleaning process for the highest process repeatability.A major LED maker in Asia has tested and qualified the patterning process on 6″ wafers, the firm said.

Typical results for PSS on 6″ wafers result in an average standard deviation (STD) within a wafer of less than 0.5; an average PSS height of 1800nm ± 40nm and PSS width of 2800nm ± 40nm; ≤ ±1.5% etching uniformity (conical shape). The system’s throughput averages greater than 2.5 wafers per hour. In cooperation with customers, Corial’s application engineers are developing recipes that best match the required specifications such as PR types, PSS shapes etc…, providing optimal edge-of-wafer results and maximizing the process uniformity and repeatability.